Join our mailing list!





Official PayPal Seal
(Your shopping cart is empty)

  Home > Diane Publishing Books >

  Electro-Physical Technique for Post-Fabrication Measurements of CMOS Process Layer Thickness: A Reprint from “Journal of Research of the NIST”
Presents a combined physical & electrical post-fab

 
Our Price: $20.00
By Janet C. Marshall (au); P. Thomas Vernier (au)
Year: 2007
Pages: 33
Binding Paperback

Product Code: 1422397637

Description
 
Presents a combined physical & electrical post-fabrication method for determining the thicknesses of the various layers in a commercial 1.5 um complementary-metal-oxide-semiconductor foundry process available through MOSIS. 42 thickness values are obtained from physical step-height measurements performed on thickness test structures & from electrical measurements of capacitances, sheet resistances, & resistivities. Appropriate expressions, numeric values, & uncertainties for each layer of thickness are presented, along with a systematic nomenclature for interconnect & dielectric thicknesses. Inconsistencies between the physical & electrical results for film thickness suggest that further uncertainty analysis is required. Illustrations.

Share your knowledge of this product with other customers... Be the first to write a review
Diane Publishing Co
PO Box 617
Darby, PA 19023-0617
1-800-782-3833
 About Us
 Become an Affiliate
 Privacy Policy
 Send Us Feedback
 
Company Info | Advertising | Product Index | Category Index | Help | Terms of Use
Copyright � 2004 Diane Publishing Company. All Rights Reserved.
Built with Volusion